Thread: Cheap i5 Setup

Buy the Intel Core i5 Barebone Kit at TigerDirect.ca

Pretty sweet setup actually... the i5 can OC higher than some i7's you just give up hyperthreading or wutever.,

Saw that deal for the us too. Pretty sweet.

This is as good a place as any.. I haven't seen anyone discuss the transition from a Front Side Bus (FSB) to the new QuickPath Interconnect (QPI)..

Anyone wanna take point? Here is the quote from Wikipedia:

Originally Posted by Wikipedia

The QPI is an element of a system architecture that Intel calls the QuickPath architecture that implements what Intel calls QuickPath technology.[5] In its simplest form on a single-processor motherboard, a single QPI is used to connect the processor to the IO Hub (e.g., to connect an Intel Core i7 to an X58). In more complex instances of the architecture, separate QPI link pairs connect one or more processors and one or more IO hubs or routing hubs in a network on the motherboard, allowing all of the components to access other components via the network. As with HyperTransport, the QuickPath Architecture assumes that the processors will have integrated memory controllers, and enables a non-uniform memory architecture (NUMA).
Each QPI comprises two 20-lane point-to-point data links, one in each direction (full duplex), with a separate clock pair in each direction, for a total of 42 signals. Each signal is a differential pair, so the total number of pins is 84. The 20 data lanes are divided onto four "quadrants" of 5 lanes each. The basic unit of transfer is the 80-bit "flit," which is transferred in two clock cycles (four 20 bit transfers, two per clock.) The 80-bit "flit" has 8 bits for error detection, 8 bits for "link-layer header," and 64 bits for "data." QPI bandwidths are advertised by computing the transfer of 64 bits (8 bytes) of data every two clock cycles in each direction.[6]
Although the initial implementations use single four-quadrant links, the QPI specification permits other implementations. Each quadrant can be used independently. On high-reliability servers, a QPI link can operate in a degraded mode. If one or more of the 20+1 signals fails, the interface will operate using 10+1 or even 5+1 remaining signals, even reassigning the clock to a data signal if the clock fails.[6]
The initial Nehalem implementation uses a full four-quadrant interface to achieve 25.6 GB/s, which provides exactly double the theoretical bandwidth of Intel's 1600 MHz FSB used in the X48 chipset.
Although the Core i7-9xx processors use QPI, other Nehalem desktop and mobile processors (e.g. Core i3, Core i5, and Core i7-8xx) do not. These processors cannot participate in a multiprocessor system. Instead, they directly implement the DMI and PCI-e interfaces.

Wat's it mean in engrish? Hades! Sidra! Priest! etc. Disssssssscuss!

I was going to get a 920.

I know that the QPI (thanks for pointing this out) creates heat. Therefore without QPI there is more headroom for overclocking but giving up QPI is a big deal in certain environments mainly multiple processor with error detection. A QPI capable processor will always out perform one without it. i7 or i9 trumps i5 or i3 and you will pay extra for it. I know of people disabling QPI on their i7's in order to break the 4ghz barrier (stable) but what they are giving up isn't worth the extra 2-400 mhz.

Originally Posted by clshades

I know that the QPI (thanks for pointing this out) creates heat. Therefore without QPI there is more headroom for overclocking but giving up QPI is a big deal in certain environments mainly multiple processor with error detection. A QPI capable processor will always out perform one without it. i7 or i9 trumps i5 or i3 and you will pay extra for it. I know of people disabling QPI on their i7's in order to break the 4ghz barrier (stable) but what they are giving up isn't worth the extra 2-400 mhz.

What is the new dymanic now, between processor, NB, SB, etc. There used to be a FSB, and now there is QPI. What are the main differences?

I haven't done enough reading on it other than what people have been posting in a couple hardware forums lurk in. QPI is basically hyper threading.

It all about communication paths. The processor needs to talk to the memory controller, since its on die (on the proc) the latency is nothing. Before AMD had put it on the CPU first, and it took Intel some time to do it. Now with QPI, basically everything talks to everything really fast. Memory, I/O and any pcix slots you have with hardware in it.

Boom there it is... if you notice the newer mobos are all pci-e /x

I meant to say pcie, but yea the qpi is going to help loads with moving data to and from different parts of the processor or chipset.